1. Field of the Invention
The invention relates to a storage control system in which control units are multiplexed and the control units access a common memory unit, and a control method for that system.
2. Description of Related Art
A mid-range storage control unit having dual control units that access common storage devices in one chassis has been proposed (See JP-A-2005-31928). In that storage control device, storage devices are arranged in arrays in the chassis, and the control units can access the storage devices via a separately provided connection system (connection path).
Each control unit, upon receipt of an I/O request from a host device, which is a host system, accesses the I/O request target storage device. The control unit includes an MPU that controls the entire control unit, cache memory, a port connected to a host device, a disk controller as an initiator that manages, under the control of the MPU, access to a data I/O request target hard disk drive from among a plurality of storage devices (hard disk drives) via an access system, and a data controller that controls data exchange between the MPU, cache memory, and disk controller.
Routes the control unit accesses the storage device through according to the I/O request from the host device include a route that passes through a disk controller in a first control unit and a first connection path, and a route that passes through a disk controller in a second control unit and a second connection path. When the control unit accesses the storage devices via those routes, communication between the control unit and the hard disk drives cannot be performed if disconnection or a connection failure occurs in either of the routes. Therefore, a port bypass circuit for bypassing (separating) part of the routes or hard disk drive is provided in case connection failure or disconnection occurs in the routes.
Meanwhile, JP-A-2004-530964 discloses a method for verifying whether or not a data block has been damaged by judging, for the purpose of maintaining data integrity, whether or not any data block has been broken by performing a logical check on data included in a data block after performing a physical checksum calculation, writing a data block in nonvolatile memory after the data block passes the logical check, then reading the data block from the nonvolatile memory, performing physical checksum verification on the data block, and also performing logical check on the data included in the data block.
There is also a method for, when a series of data is read out in blocks from a storage device and that data is stored in a data storage unit in a data controller, updating data stored in the data storage unit with write data if a write target block for the write data is a block stored in the data storage unit; and, if the write target block for the write data is not a block stored in a data storage position generating an guarantee code based on a series of data stored in the data storage unit, adding the guarantee code to that data series, and transferring that data (see JP-A-2005-84799). Techniques disclosed in JP-A-2005-183420, JP-A-2002-251332, and JP-A-2005-327230 relate to the same technical field.
JP-A-2002-251332 discloses, for the purpose of providing an information transfer processing device for verifying processing for converting data transferred between a host device and a slave device, an information conversion processing device for controlling data transfer between an information processing device and at least one storage device, the device being provided between the information processing device and the storage device(s), including a physical information generator for converting logical transfer information about transfer from the information processing device to the storage devices, and a verification unit for verifying whether or not the conversion performed in the physical information generator has been properly performed and outputting the verification result.
JP-A-2005-327230 discloses, owing to the need for an electronic switch that enables two host ports to simultaneously access a single-port type storage unit connected to a device port in a switch via a serial advanced technology attachment (serial ATA) link or an advanced technology attachment (ATA) link, a switch including a first serial ATA port connected to a first host unit, a second serial ATA port connected to a second host unit, a third serial ATA port connected to a device, an arbitration/control circuit for selecting either of the first or second host unit that is to be connected to the device via the switch every time either the first or second host unit transmits a command executed by the device.
If command translation processing has to be performed in a control unit based on command information when the control unit accesses a storage device, a corrupted bit caused by an α-ray cannot be detected just by performing parity calculation to prevent a invalid command, and reception of an invalid command and execution of incorrect IO access by a hard disk drive are prevented.
In a technique disclosed in JP-A-2005-183420, because a diffusion layer (gate area) forming node capacity decreases in accordance with a decrease in memory size or wire size, the node capacity decreases accordingly and soft error problems occur. Those soft errors occur when a memory cell is radiated with an α-ray or neutron ray. Data potential accumulated in the node capacity moves to the side of a semiconductor board, and the data disappears.
An object of the present invention is to provide a means for detecting, if data has been corrupted when translating data that forms a command between a storage device and a control unit, the corrupted data that forms the command, and to provide a storage control system and method for preventing incorrect IO access to a hard disk drive so that a controller can execute proper error handling.